This application claims priority from Korean Patent Application No. P97-53023, filed on Oct. 16, 1997, which is hereby incorporated by reference in its entirety.
1. Field of the Invention
This invention relates to a high speed packet switching controller in a telephone switching system which improves the system performance using optimized switching operations and, more particularly, allows the system to be applied to a circuit requiring high speed and large capacity characteristics by controlling a crossbar switch which receives packet data and switches among suitable output lines.
2. Description of the Prior Art
A conventional switching system is generally suitable for small capacity use in order to satisfy the switching speed with its performance. Specifically, a crossbar switch is well known to the conventional switching system as a representative switch which provides superior ability in view of the system performance.
However, when the speed of the input packet is high and the communication circumstances have various multimedia data services with large switching capacity, the system performance of a small switching system will suddenly decrease. Accordingly, the small switching system is not suitable for a high speed/large switching system. Also, if the small switching system and programs executing the switching operation change to meet the changed system circumstance, many limitations should be considered.
Therefore, it is an object of the present invention to provide a high speed packet switching controller in a telephone switching system which can suitably be applied to a packet controller having large capacity which uses a neural network chip while maximizing the system performance by optimizing the switching operation.
It is another object of the present invention to provide a telephone switching system for a high speed/large switching capacity.
In order to achieve the above object, a high speed packet switching controller comprises a row address decoder for decoding a weight raw address which is inputted thereto; a column address decoder for decoding a weight column address which is inputted thereto; a matrix array for using the address signals provided from the row address decoder and column address decoder, and outputting varied voltage in accordance with an external weight value; a neural network for producing a final crossbar switching control signal; an external input/output bus for transmitting an output signal of the neural network; and an internal neural data bus for transmitting the address signal output from the row address decoder and column address decoder to the matrix array.
In order to achieve another object, there is provided to a telephone switching system, having a high speed packet switching controller using a neural network chip, an input buffer unit for storing a packet data inputted into the telephone switching system; a crossbar switching unit for switching a transmission line of the packet data output by the input buffer unit into other transmission lines, and a neural network switching control unit for controlling the switching operations of the crossbar switching unit.
Accordingly, an analog/digital super-high density integrated circuit for applying a communication system is achieved, and also, parallel hardware using a neural network chip for a switching controller having high speed/large capacity are provided according to the features of the present invention.